//******************************************************************************
// MSP430F20xx Demo - LFXT1 Oscillator Fault Detection
//
// Description: System runs normally in LPM3 with WDT timer clocked by
// 32kHz ACLK with a 1x4 second interrupt. P1.0 is normally pulsed every
// second inside WDT interrupt. If an LFXT1 oscillator fault occurs,
// NMI is requested forcing exit from LPM3. P1.0 is toggled rapidly by software
// as long as LFXT1 oscillator fault is present. Assumed only LFXT1 as NMI
// source - code does not check for other NMI sources.
// ACLK = LFXT1 = 32768, MCLK = SMCLK = Default DCO
//
// //*External watch crystal on XIN XOUT is required for ACLK*//
//
// M. Buccini / L. Westlund
// Texas Instruments Inc.
// September 2005
// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.40A
// modified by justin solarski to work with MSPGCC 4.0
//******************************************************************************
#include <msp430.h>
#include <signal.h> // must be included for interrupt handler
volatile unsigned int i;
void main(void)
{
WDTCTL = WDT_ADLY_1000; // WDT 1s interval timer
IE1 |= WDTIE; // Enable WDT interrupt
P1DIR = 0xFF; // All P1.x outputs
P1OUT = 0; // All P1.x reset
P2DIR = 0xFF; // All P2.x outputs
P2OUT = 0; // All P2.x reset
BCSCTL3 = XCAP_3; //12.5pF cap- setting for 32768Hz crystal
// An immedate Osc Fault will occur next
IE1 |= OFIE; // Enable Osc Fault
_enable_interrupt(); // enable interrupts added for mspgcc
while(1)
{
P1OUT ^= 0x01; // Toggle P1.0 using exclusive-OR
_BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/interrupt
}
}
//#pragma vector=WDT_VECTOR removed for mspgcc
interrupt(WDT_VECTOR) watchdog_timer (void) //__interrupt void watchdog_timer (void) removed for mspgcc
{
_BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from 0(SR)
}
//#pragma vector=NMI_VECTOR removed for mspgcc
interrupt(NMI_VECTOR) nmi_ (void) //__interrupt void nmi_ (void) removed for mspgcc
{
do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0xFFF; i > 0; i--); // Time for flag to set
P1OUT ^= 0x01; // Toggle P1.0 using exclusive-OR
}
while (IFG1 & OFIFG); // OSCFault flag still set?
IE1 |= OFIE; // Enable Osc Fault
}